M5M4V64S30ATP-8 - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

Mitsubishi

Datasheet Details

Part number	M5M4V64S30ATP-8
Manufacturer	Mitsubishi
File Size	1.07 MB
Description	64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Datasheet	M5M4V64S30ATP-8_MitsubishiElectricSemiconductor.pdf

The M5M4V64S30ATP is a 4-bank x 2097152-word x 8-bit Synchronous DRAM, with LVTTL interface.

- Single 3.3v±0.3v power supply - Clock frequency 125MHz / 100MHz / 83MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8 (programmable) - Burst type- sequential / interleave (programmable) - Column access - random - Auto precharge / All bank precharge controlled by A10 - Auto refresh and Self refresh - 4096 refresh cycles /64ms - Column address A0-A8 - LVTTL Interfac.

📁 M5M4V64S30ATP-8 Similar Datasheet

M5M417800AJ - Fast Page Mode 16M-Bit DRAM (Mitsubishi Electric)
M5M417800CJ - Fast Page Mode 16M-Bit DRAM (Mitsubishi Electric)
M5M417800DJ - Fast Page Mode 16M-Bit DRAM (Mitsubishi Electric)
M5M417805CJ - Hyper Page Mode 16M-Bit DRAM (Mitsubishi Electric)
M5M417805DJ - EDO Mode 16M-Bit DRAM (Mitsubishi Electric)
M5M4256AJ-10 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)
M5M4256AJ-12 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)
M5M4256AJ-15 - Page Mode 262144-Bit DRAM (Mitsubishi Electric Semiconductor)

Other Datasheets by Mitsubishi

M5M4V64S30ATP-8A - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8L - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-10 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S30ATP-10L - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-12 - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S20ATP-10 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM

Published: Apr 26, 2005 |