* th th trec
* CEP, CET or DATA Parameter Clock Pulse Width Low MR or SR Pulse Width Setup Time, other
* Setup Time PE or SR Hold Time, data Hold Time, other Recovery Time MR to CP Min 25 20 20 25 3 0 15 Typ Max Unit ns ns ns ns ns ns ns Test Conditions VCC = 5.0 V DEFINITION OF TERMS S
SN54LS160A Datasheet (157.94 KB)
SN54LS160A
Motorola Inc
157.94 KB
Bcd decade counters/ 4-bit binary counters.
BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS The LS160A / 161A / 162A / 163A are high-speed 4-bit synchronous counters. They are edge-triggered, synchro.
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