MCM63P818 Datasheet, Ram, Motorola

MCM63P818 Features

• Ram , LBO, and ZZ. Linear Burst Order Input: This pin must remain in steady state (this signal not registered or latched). It must be tied high or low. Low
    – linear burst co

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MCM63P818

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Motorola

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📄 Datasheet

Description:

128k x 36 and 256k x 18 bit pipelined burstram synchronous fast static ram. Pin Locations 4B Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst

MCM63P818 Application

• Applications Synchronous design allows precise cycle control with the use of an external clock (K). Addresses (SA), data inputs (DQx), and all cont

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