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MCM69Q618 64K x 18 Bit Synchronous Separate I/O SRAM

MCM69Q618 Description

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69Q618/D Advance Information MCM69Q618 64K x 18 Bit Synchronous Separate I/O Fast.
Pin Locations 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 81, 83, 85, 98, 100 3, 5, 9, 11, 16, 18, 22, 24, 28, 52, 56, 58, 62, 64, 69, 71, 75, 77 90.

MCM69Q618 Features

* separate data input and data output buffers and incorporates input and output registers on board with high speed SRAM. The MCM69Q618 allows the user to perform transparent write and data pass through. Two data bus ports are provided
* a data input (D) and a data output (Q) port. The synchron

MCM69Q618 Applications

* ATM
* Ethernet Switches
* Cell/Frame Buffers
* SNA Switches Product Family Configurations Part Number Dual Address MCM69D536 MCM69D618 MCM69Q536 MCM69Q618 MCM67Q709 MCM67Q909 n n Single Address Dual I/O Note 1 Note 1 n n n n n n Separate I/O Note 2 Note 2

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Datasheet Details

Part number
MCM69Q618
Manufacturer
Motorola
File Size
178.98 KB
Datasheet
MCM69Q618_MotorolaInc.pdf
Description
64K x 18 Bit Synchronous Separate I/O SRAM

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64K Bit Synchronous Separate SRAM Motorola
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