UPA672T Datasheet | NEC

FEATURES - Two MOS FET circuits in package the same size as SC-70 - Automatic mounting supported 1.25 ±0.1 2.1 ±0.1 6 5 4 0 to 0.1 1 2 3 0.7 0.9 ±0.1 1.3 2.0 ±0.2 PIN CONNECTION 6 5 4 1. Source 1 (S1) 2. Gate 1 (G1) 3. Drain 2 (D2) 4. Source 2 (S2) 5. Gate 2 (G2) 6. Drain 1 (D1) Marking: MA ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C) PARAMETER Drain to Source Voltage Gate to Source Voltage Drain Current (DC) Drain Current (pulse) Total Power Dissipation Channel Temperature Storage Temperature SYMBOL VDSS VGSS ID(DC) ID(pulse) PT Tch Tstg PW ≤ 10 ms, Duty Cycle ≤ 50 % TEST CONDITIONS RATINGS 50 ± 7.0 100 200 200 (Total) 150 - 55 to +150 UNIT V V m A m A m W ˚C ˚C Document No. G11259EJ1V0DS00 (1st edition) Date Published June 1996 P Printed in Japan © µPA672T ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) PARAMETER Drain Cut-off Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-State Resistance Drain to Source On-State Resistance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time SYMBOL IDSS IGSS VGS(off) |yfs| RDS(on)1 RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf VDD = 3 V, ID = 20 m A, VGS(on) = 3 V, RG = 10 Ω, RL = 120 Ω TEST CONDITIONS VDS = 50 V, VGS = 0 VGS = ± 7.0 V, VDS = 0 VDS = 3.0 V, ID = 1.0 µA VDS = 3.0 V, ID = 10 m A VGS = 2.5 V, ID = 10 m A VGS = 4.0 V, ID = 10 m A VDS = 3.0 V, VGS = 0, f = 1.0 MHz 0.7 20 20 15 6 8 1.2 9 50 20 40 40 20 1.0 MIN. TYP. MAX. 10 ± 5.0 1.5 UNIT µA µA V m S Ω Ω p F p F p F ns ns ns ns SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS VGS DUT RL Gate voltage waveform 10 % VGS(on) 90 % VDD RG PG. Drain current waveform VGS 0 τ τ = 1µs Duty Cycle ≤ 1 % 0 10 % ID 90 % 90 % ID 10 % td(on) ton tr td(off) toff tf µPA672T TYPICAL CHARACTERISTICS (TA = 25 ˚C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 100 - Total Power Dissipation - m...