74AHC273 Datasheet (NXP) - Octal D-type flip-flop

74AHC273, Octal D-type flip-flop

74AHC273; 74AHCT273 The 74AHC/AHCT273 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

The 74AHC/AHCT273 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.

74AHC273 Features

* Ideal buffer for MOS microcontroller or memory

* Common clock and master reset

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V

* Balanced propagation delays

* All inputs have Schmit