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74AHC374 Octal D-type flip-flop

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Description

INTEGRATED CIRCUITS DATA SHEET 74AHC374; 74AHCT374 Octal D-type flip-flop; positive edge-trigger; 3-state Product specification Supersedes data of 19.
74AHC374; 74AHCT374 The 74AHC/AHCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

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Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V
* Balanced propagation delays
* All inputs have Schmitt-trigger actions
* Inputs accepts voltages higher than VCC
* Common 3-state outp

Applications

* A clock (CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW the contents of the 8 flip-flops are available at the outpu

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