74AHCT595 Datasheet - NXP

8-bit serial-in/serial or parallel-out shift register

74AHCT595 Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V

* Balanced propagation delays

* All inputs have Schmitt-trigger actions

* Inputs accept voltages higher than VCC

* For AHC only: operat

74AHCT595 General Description

74AHC595; 74AHCT595 The 74AHC/AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The .

74AHCT595 Datasheet (103.31 KB)

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74AHCT595

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NXP ↗

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103.31 KB

Description:

8-bit serial-in/serial or parallel-out shift register.
INTEGRATED CIRCUITS DATA SHEET 74AHC595; 74AHCT595 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state Product speciﬁ.

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74AHCT595 8-bit serial-in serial parallel-out shift register NXP

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74AHCT595 Features

74AHCT595 General Description

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