74AHCT74 Datasheet (NXP) - Dual D-type flip-flop

74AHCT74, Dual D-type flip-flop

The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7A.

The 74AHC/AHCT74 dual positive-edge triggered, D-type flip-flops with individual data (D) inputs, clock (CP) inputs, set (SD)

74AHCT74 Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

* Balanced propagation delays

* Inputs accepts voltages higher than VCC

* For AHC only: operates with CMOS input levels

* For AHCT only: operates with TTL input levels