Datasheet4U Logo Datasheet4U.com

74AUP1G79 Datasheet - NXP

Low-power D-type flip-flop

74AUP1G79 Features

* s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-C exceeds 2000 V x MM

74AUP1G79 General Description

The 74AUP1G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device e.

74AUP1G79 Datasheet (120.30 KB)

Preview of 74AUP1G79 PDF

Datasheet Details

Part number:

74AUP1G79

Manufacturer:

NXP ↗

File Size:

120.30 KB

Description:

Low-power d-type flip-flop.
www.DataSheet4U.com 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Rev. 01 12 September 2005 Product data sheet 1. General desc.

📁 Related Datasheet

74AUP1G74 Low-power D-type flip-flop (nexperia)

74AUP1G74-Q100 Low-power D-type flip-flop (nexperia)

74AUP1G79 Low-power D-type flip-flop (nexperia)

74AUP1G00 Low-power 2-input NAND gate (NXP Semiconductors)

74AUP1G00 SINGLE 2 INPUT POSITIVE NAND GATE (Diodes)

74AUP1G00 Low-power 2-input NAND gate (nexperia)

74AUP1G00-Q100 Low-power 2-input NAND gate (nexperia)

74AUP1G02 Low-power 2-input NOR gate (NXP)

74AUP1G02 SINGLE 2 INPUT POSITIVE NOR GATE (Diodes)

74AUP1G02 Low-power 2-input NOR gate (nexperia)

TAGS

74AUP1G79 Low-power D-type flip-flop NXP

Image Gallery

74AUP1G79 Datasheet Preview Page 2 74AUP1G79 Datasheet Preview Page 3

74AUP1G79 Distributor