74AUP1G74 Datasheet - nexperia

Low-power D-type flip-flop

74AUP1G74 Features

* Wide supply voltage range from 0.8 V to 3.6 V

* CMOS low power dissipation

* High noise immunity

* Overvoltage tolerant inputs to 3.6 V

* Low static power consumption; ICC = 0.9 μA (maximum)

* Latch-up performance exceeds 100 mA per JESD 78 Class II

74AUP1G74 General Description

The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the f.

74AUP1G74 Datasheet (344.92 KB)

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Datasheet Details

Part number:

74AUP1G74

Manufacturer:

nexperia ↗

File Size:

344.92 KB

Description:

Low-power d-type flip-flop.
74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Rev. 13 23 January 2023 Product data sheet 1. General de.

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74AUP1G74 Low-power D-type flip-flop nexperia

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74AUP1G74 Features

74AUP1G74 General Description

Datasheet Details

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