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74LVC1G18 1-of-2 non-inverting demultiplexer

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Description

INTEGRATED CIRCUITS DATA SHEET 74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output Product specification 2003 Jul 25 Philips.
74LVC1G18 The 74LVC1G18 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

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Features

* Wide supply voltage range from 1.65 to 5.5 V
* 5 V tolerant input/output for interfacing with 5 V logic
* High noise immunity
* Complies with JEDEC standard:
* JESD8-7 (1.65 to 1.95 V)
* JESD8-5 (2.3 to 2.7 V)
* JESD8B/JESD36 (2.7 to 3.6 V).

Applications

* using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer with a 3-state output. The 74LVC1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,

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