74LVC74A
99.08kb
Dual d-type flip-flop. 74LVC74A
TAGS
📁 Related Datasheet
74LVC74A - Dual D-type flip-flop
(nexperia)
74LVC74A
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 11 — 22 February 2024
Product data sheet
1. General description
The .
74LVC74A-Q100 - Dual D-type flip-flop
(nexperia)
74LVC74A-Q100
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 3 — 18 June 2020
Product data sheet
1. General description
The .
74LVC74AD - Dual D-type flip-flop
(nexperia)
74LVC74A
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 11 — 22 February 2024
Product data sheet
1. General description
The .
74LVC00A - LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE
(STMicroelectronics)
74LVC00A
LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE
s 5V TOLERANT INPUTS
s HIGH SPEED: tPD = 4.3ns (MAX.) at VCC = 3V
s POWER DOWN PR.
74LVC00A - QUADRUPLE 2-INPUT NAND GATES
(Diodes)
74LVC00A
QUADRUPLE 2-INPUT NAND GATES
Description
The 74LVC00A provides four independent 2-input NAND gates. The device is designed for operation wit.
74LVC00A - Low-Voltage CMOS Quad 2-Input NAND Gate
(ON Semiconductor)
74LVC00A
Low-Voltage CMOS Quad 2-Input NAND Gate
With 5 V−Tolerant Inputs
The 74LVC00A is a high performance, quad 2−input NAND gate operating from a.
74LVC00A - Quad 2-input NAND gate
(nexperia)
74LVC00A
Quad 2-input NAND gate
Rev. 9 — 17 September 2021
Product data sheet
1. General description
The 74LVC00A is a quad 2-input NAND gate. Input.
74LVC00A-Q100 - Quad 2-input NAND gate
(nexperia)
74LVC00A-Q100
Quad 2-input NAND gate
Rev. 3 — 7 October 2021
Product data sheet
1. General description
The 74LVC00A-Q100 is a quad 2-input NAND gate.
74LVC02 - Quad 2-input NOR gate
(Philips)
INTEGRATED CIRCUITS
74LVC02A Quad 2-input NOR gate
Product specification Supersedes data of 1997 Aug 11 IC24 Data Handbook 1998 Apr 28
Philips Semic.
74LVC02A - Low-Voltage CMOS Quad 2-Input NOR Gate
(ON Semiconductor)
74LVC02A
Low-Voltage CMOS Quad 2-Input NOR Gate
With 5 V−Tolerant Inputs
The 74LVC02A is a high performance, quad 2−input NOR gate operating from a 1.