74LVC74AD - Dual D-type flip-flop
The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the clock input.
Information on the data inp
74LVC74AD Features
* 5 V tolerant inputs for interlacing with 5 V logic
* Wide supply voltage range from 1.2 V to 3.6 V
* CMOS low power consumption
* Direct interface with TTL levels
* Complies with JEDEC standard:
* JESD8-7A (1.65 V to 1.95 V)
* JESD8-5A (2.3 V
