HEF4011UB Datasheet - NXP

Quadruple 2-input NAND gate

HEF4011UB General Description

The HEF4011UB is a quadruple 2-input NAND gate. This unbuffered single stage version provides a direct implementation of the NAND function. The output impedance and output transition time depends on the input voltage and input rise and fall times applied. HEF4011UB gates Fig.2 Pinning diagram. HE.

HEF4011UB Datasheet (134.52 KB)

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HEF4011UB

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NXP ↗

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134.52 KB

Description:

Quadruple 2-input nand gate.
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HE.

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HEF4011UB Quadruple 2-input NAND gate NXP

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HEF4011UB General Description

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