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HEF4015B

Dual 4-bit static shift register

HEF4015B Features

* Tolerant of slow clock rise and fall times

HEF4015B General Description

The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (MR). Information present on D is .

HEF4015B Datasheet (119.55 KB)

Preview of HEF4015B PDF

Datasheet Details

Part number:

HEF4015B

Manufacturer:

NXP ↗

File Size:

119.55 KB

Description:

Dual 4-bit static shift register.

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TAGS

HEF4015B Dual 4-bit static shift register NXP

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