HEF40195B Datasheet - NXP

4-bit universal shift register

HEF40195B General Description

The HEF40195B is a fully synchronous edge-triggered 4-bit shift register with a clock input (CP), four synchronous parallel data inputs (P0 to P3), two synchronous serial data inputs (J, K), a synchronous parallel enable input (PE), buffered parallel outputs from all 4-bit positions (O0 to O3), a bu.

HEF40195B Datasheet (77.78 KB)

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HEF40195B

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NXP ↗

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77.78 KB

Description:

4-bit universal shift register.
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HE.

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HEF40195B 4-bit universal shift register NXP

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HEF40195B General Description

Datasheet Details

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