MIMX8MD6CVAHZAA Datasheet - NXP

MIMX8MD6CVAHZAA Applications Processors

NXP Semiconductors Data Sheet: Technical Data Document Number: IMX8MDQLQIEC Rev. 3, 04/2021 MIMX8MQ6CVAHZAA MIMX8MD6CVAHZAA MIMX8MQ5CVAHZAA MIMX8MQ6CVAHZAB MIMX8MD6CVAHZAB MIMX8MQ5CVAHZAB i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products Package Information Bare Die Package FBGA 17 x 17 mm, 0.65 mm pitch Ordering Information See Table 2 on page 6 1 i.MX 8M Dual / 8M QuadLite / 8M Quad introduction The i.MX 8M Dual / 8M QuadLite / 8M Quad proce.

MIMX8MD6CVAHZAA Features

* Feature Quad symmetric Cortex-A53 processors:

* 32 KB L1 Instruction Cache

* 32 KB L1 Data Cache

* Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture:

* 1 MB unified L2 cache

* Support L2 cache RAMs protection with ECC

MIMX8MD6CVAHZAA Datasheet (1.28 MB)