* Feature Quad symmetric Cortex-A53 processors:
* 32 KB L1 Instruction Cache
* 32 KB L1 Data Cache
* Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture:
* 1 MB unified L2 cache
* Support L2 cache RAMs protection with ECC
MIMX8MD6DVAJZAA Datasheet (1.36 MB)
MIMX8MD6DVAJZAA
1.36 MB
I.mx 8m dual / 8m quadlite / 8m quad applications processors.
NXP Semiconductors Data Sheet: Technical Data Document Number: IMX8MDQLQCEC Rev. 3, 04/2021 MIMX8MQ6DVAJZAA MIMX8MQ5DVAJZAA MIMX8MQ6DVAJZIB MIMX8MD6.
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