PCKV857A - 100-250 MHz differential 1:10 clock driver
The PCKV857A is a high-performance, low-skew, low-jitter zero delay buffer designed for 2.5 V VDD and 2.5 V AVDD operation and differential data input and output levels.
The PCKV857A is a zero delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock
PCKV857A Features
* ESD classification testing is done to JEDEC Standard JESD22. Protection exceeds 2000 V to HBM per method A114. PIN CONFIGURATION GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GND 7 GND 8 Y2 9 Y2 10 VDDQ 11 VDDQ 12 CLK 13 CLK 14 VDDQ 15 AVDD 16 AGND 17 GND 18 Y3 19 Y3 20 VDDQ 21 Y4 22 Y4 23 GND 24 48
