* General
* Uses single external Synchronous DRAM (SDRAM) organized as 1M × 16 interfacing at 81 MHz; compatible with the SDRAM ‘lite’ or ‘PC’
* Fast external CPU interface; 16-bit data + 8-bit address
* Dedicated input for audio and video data in PES or ES format; data input r
SAA7201
292.16 KB
Integrated mpeg2 avg decoder.
INTEGRATED CIRCUITS
DATA SHEET
SAA7201 Integrated MPEG2 AVG decoder
Objective specification File under Integrated Circuits, IC02 1997 Jan 29
Philips.
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This data sheet contains advance information and specifications are subject to change without notice.
l____S_A_A_7_2_1_0 _____
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