SSTV16857 Overview
Description
Q6 10 Q7 11 VDDQ 12 GND 13 Q8 14 Q9 15 VDDQ 16 GND 17 Q10 18 Q11 19 Q12 20 VDDQ 21 GND 22 Q13 23 Q14 24 The SSTV16857 is a 14-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V. VDDQ must not exceed VCC.
Key Features
- Stub-series terminated logic for 2.5 V VDDQ (SSTL_2)
- Optimized for DDR (Double Data Rate) SDRAM applications
- Inputs compatible with JESD8–9 SSTL_2 specifications
- Flow-through architecture optimizes PCB layout
- ESD classification testing is done to JEDEC Standard JESD22
- Latch-up testing is done to JEDEC Standard JESD78, which exceeds 100 mA
- Same form, fit, and function as SSTL16877 Protection exceeds 2000 V to HBM per method A114
