Datasheet Details
- Part number
- 74LVC1G74
- Manufacturer
- NXP ↗ Semiconductors
- File Size
- 138.69 KB
- Datasheet
- 74LVC1G74_NXPSemiconductors.pdf
- Description
- Single D-type flip-flop
74LVC1G74 Description
74LVC1G74 Rev.05 * 9 August 2007 www.DataSheet4U.com Single D-type flip-flop with set and reset; positive edge trigger Product data sheet 1..
The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and (RD) inputs, and com.
74LVC1G74 Features
* s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V) ±24 mA output drive (VCC = 3.0 V) ESD protection: x HB
74LVC1G74 Applications
* using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the L
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