Description
Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the 90A and divideby-eight for the 93A
All of these counters have a gated zero reset and the 90A also has gated set-to-nine inputs for use in BCD nine’s complement applications
To use their maximum count length (decade or four-bit binary) the B input is connected to the QA output The
Features
- Y Typical power dissipation 90A 145 mW 93A 130 mW
Y Count frequency 42 MHz
Connection Diagrams
Dual-In-Line Package
TL F 6533.
- 1
Order Number DM5490J DM5490W or DM7490AN See NS Package Number J14A N14A or W14B
Dual-In-Line Package
Order Number DM7493AN See NS Package Number N14A
TL F 6533.
- 2
C1995 National Semiconductor Corporation TL F 6533
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note)
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