5497 Datasheet - National Semiconductor

5497 - Synchronous Modulo-64 Bit Rate Multiplier

The ’97 contains a synchronous 6-stage binary counter and six decoding gates that serve to gate the clock through to the output at a sub-multiple of the input frequency The output pulse rate relative to the clock frequency is determined by signals applied to the Select (S0 *S5) inputs Both tr

5497 Features

* 010101 0101 5

5497_NationalSemiconductor.pdf