Description
DS90UR241Q/DS90UR124Q 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset www.DataSheet4U.com DS90UR241Q DS90UR124Q Septemb.
The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock in.
Features
* pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects. Using National Semiconductor’s proprietary random lock, the Serializer’s parallel data are randomized to the Deserializer without the need of RE
Applications
* Automotive Central Information Display Automotive Instrument Cluster Display Automotive Heads-Up Display Remote Camera-based Driver Assistance Systems
Applications Diagram
20194527
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