Description
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS90UR124-Q1, DS90UR241-Q1 SNLS231O * SEPTEMBER 2006.
The DS90URxxx-Q1 chipset translates a 24-bit parallel bus into a fully transparent data/control FPDLink II LVDS serial stream with embedded clock info.
Features
* 1 Supports Displays With 18-Bit Color Depth
* 5-MHz to 43-MHz Pixel Clock
* Automotive-Grade Product AEC-Q100 Grade 2 Qualified
* 24:1 Interface Compression
* Embedded Clock With DC Balancing Supports AC-Coupled Data Transmission
* Capable to Drive up
Applications
* Diagram
Host
(Graphics/Video Processor, ECU)
Display
(Infotainment, Instrument Cluster, CID)
DE
RGB Data Video Source Clock
HSYNC
DS90UR241 Serializer
VSYNC
(LVCMOS)
FPD-Link II 1 Pair (LVDS)
DE RGB Data DS90UR124 Deserializer Clock
HSYNC
VSYNC
(LVCMOS)
LCD
2 Applications
* Automo
