* a variabledepth FIFO which can be adjusted to delay the output data up to 4 parallel data clock periods. Ancillary Data may be selectively extracted from the parallel data through the use of masking and control bits in the configuration and control registers and stored in the on-chip FIFO. Reverse L
LMH0031
National Semiconductor
792.76 KB
Digital video deserializer descrambler.
www.DataSheet4U.com
LMH0031 SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancillary Data FIFOs
January 2006
LMH0031 SMPTE.
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