Description
These 8-bit registers feature totem-pole TRI-STATE outputs
designed specifically for driving highly-capacitive or relative-
ly low-impedance loads The high-impedance state and in-
creased high-logic level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components They are particularly attractive
for implementing buffer registers I O ports bidirectional
bus drivers
Features
- Y Choice of 8 latches or 8 D-type flip-flops in a single package
Y TRI-STATE bus-driving outputs Y Full parallel-access for loading Y Buffered control inputs Y P-N-P inputs reduce D-C loading on data lines
Connection Diagrams
Dual-In-Line Packages ’LS373
Order Number DM54LS373J DM54LS373W DM74LS373N or DM74LS373WM See NS Package Number J20A M20B N20A or
W20A
’LS374
TL F 6431.
- 1
Order Number DM54LS374J DM54LS374W DM74LS374WM or DM74LS374N See NS Package Number J20A M20B N20A or
W20A.
DM54LS373-NationalSemiconductor.pdf