NIKO-SEM www.DataSheet4U.com N-Channel Logic Level Enhancement Mode Field Effect Transistor P55N02LD TO-252 (DPAK) D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 10mΩ ID 55A 1.
GATE 2.
DRAIN 3.
SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 55 36 140 20 140 5.6 60 38 -55 to 15
