MC100E167 Datasheet - ON Semiconductor

MC100E167 6-BIT 2:1 MUX-REGISTER

The MC10E/100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynch.

MC100E167 Features

* http://onsemi.com

* The 100 Series contains temperature compensation. 1000 MHz Min. Operating Frequency 800 ps Max. Clock to Output Single-Ended Outputs Async

MC100E167_ONSemiconductor.pdf