MC100E212 Datasheet - ON Semiconductor

MC100E212 3-BIT SCANNABLE REGISTERED ADDRESS DRIVER

PIN D0 * D2 S-IN LOAD SHIFT CLK MR S-OUT Q[0:2]a, Q[0:2]b Q[0:2]a, Q[0:2]b VCC, VCCO VEE NC FUNCTION ECL Data Inputs ECL Scan Input ECL LOAD/HOLD Control ECL Scan Control ECL Clock ECL Reset ECL Scan Output ECL True Outputs ECL Inverting Outputs Positive Supply Negative Supply No Connect FU.

www.DataSheet4U.com MC10E212, MC100E212 5V ECL 3-Bit Scannable Registered Address Driver The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to conserve array output cell functionality and also output pins. The input shift register is designed with control logic which greatly facilitates its use in boundary scan applications. The 100 Series contains tempe.

MC100E212 Features

* 1405 AN1406 AN1503 AN1504 AN1568 AN1596 AN1650 AN1672 AND8001 AND8002 AND8020

* ECL Clock Distribution Techniques Designing with PECL (ECL at +5.0 V) ECLinPS I/O SPICE Modeling Kit Metastabi

MC100E212 Datasheet (209.61 KB)