MC100LVELT23 - Dual Differential LVPECL to TTL Translator

ON Semiconductor

MC100LVELT23 Datasheet Preview — Preview of MC100LVELT23 PDF

Datasheet Details

Part number	MC100LVELT23
Manufacturer	ON Semiconductor ↗
File Size	147.53 KB
Description	Dual Differential LVPECL to TTL Translator
Datasheet	MC100LVELT23_ONSemiconductor.pdf

MC100LVELT23 Product details

Description

The MC100LVELT23 is a dual differential LVPECL/LVDS to LVTTL translator.Because LVPECL (Positive ECL) or LVDS levels are used only +3.3 V and ground are required.The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which require the translation of a clock and a data signal.The LVELT23 is available in only the ECL 100K standard.Since there are no LVPECL outputs or an external VBB reference, the LVELT23 does not require both ECL standard vers

Features

2.0 ns Typical Propagation Delay.
Maximum Frequency > 180 MHz.
Differential LVPECL Inputs.
PECL Mode Operating Range:VCC = 3.0 V to 3.8 V with GND = 0 V.
24 mA LVTTL Outputs.
Flow Through Pinouts.
Internal Pulldown and Pullup Resi.

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Published: Apr 26, 2005 |