MC14027B - Dual J-K Flip-Flop

ON Semiconductor

Datasheet Details

Diode Protection on All Inputs.
Supply Voltage Range = 3.0 Vdc to 18 Vdc.
Logic Swing Independent of Fanout.
Logic Edge.
Clocked Flip.
Flop Design.
Logic State is Retained Indefinitely with Clock Level Either High or Low; Information is Transferred to the Output Only on the Positive.
Going Edge of the Clock Pulse.
Capable of Driving Two Low.
Power TTL Loads or One Low.
Power Schottky TTL Load Over the Rated.

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Published: Apr 26, 2005 |