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NB4N11M

Multi Level Clock/Data Input to CML Receiver/Buffer/Translator

NB4N11M Features

* Maximum Input Clock Frequency > 2.5 GHz

* Maximum Input Data Rate > 2.5 Gb/s

* Typically 1 ps of RMS Clock Jitter

* Typically 10 ps of Data Dependent Jitter @ 2.5 Gb/s, RL = 25 W

* 420 ps Typical Propagation Delay

* 150 ps Typical Rise and Fall Times

NB4N11M General Description

The NB4N11M is a differential 1

*to

*2 clock/data distribution/translation chip with CML output structure, targeted for high

*speed clock/data applications. The device is functionally equivalent to the EP11, LVEP11, SG11 or 7L11M devices. Device produces two identical differenti.

NB4N11M Datasheet (273.37 KB)

Preview of NB4N11M PDF

Datasheet Details

Part number:

NB4N11M

Manufacturer:

ON Semiconductor ↗

File Size:

273.37 KB

Description:

Multi level clock/data input to cml receiver/buffer/translator.

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TAGS

NB4N11M Multi Level Clock Data Input CML Receiver Buffer Translator ON Semiconductor

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