Pin Name I/O Description 1 NC * No Connect.
2 D ECL, CML, LVCMOS, LVDS, Noninverted Differential Input.
(Note 1) LVTTL Input 3 D ECL, CML, LVCMOS, LVDS, Inverted Differential Input.
(Note 1) LVTTL Input 4 VBB * Internally Generated Reference Voltage Supply.
5 VE
NB4N316M 3.3 V AnyLevel] Receiver to CML Driver/Translator with Input Hysteresis 2.0 GHz Clock / 2.5 Gb/s Data The NB4N316M is a differential Clock or Data receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS.
These signals will be translated to CML, operating up to 2.0 GHz or 2.5 Gb/s, respectively.
As such, the NB4N316M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications.
The CML outputs are 16 mA open collector
NB4N316M Features
* an input threshold hysteresis of approximately 25 mV, providing increased noise immunity and stability. The device is offered in a small 8
* pin TSSOP package (MSOP
* 8 compatible). Application notes, models, and support documentation are available at www.onsemi.com. Features
* M
Datasheet Details
NB4N316M
225.76 KB
Anylevel receiver to cml driver/translator.
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