NB7L32M Datasheet (ON Semiconductor) - Clock Divider w/CML Output and Internal Termination

NB7L32M, Clock Divider w/CML Output and Internal Termination

The NB7L32M is an integrated ÷2 divider with differential clock inputs and asynchronous reset.

Differential clock inputs incorporate internal 50 W termination resistors and accept LVPECL (Positive ECL), CML, or LVDS.

The high frequency reset pin is asserted on the rising edge.

Upon power *up,

NB7L32M Features

* Maximum Input Clock Frequency 14 GHz Typical

* 200 ps Max Propagation Delay

* 30 ps Typical Rise and Fall Times

* < 0.5 ps Maximum (RMS) Random Clock Jitter

* Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V

* CML Output Level (400 mV Peak