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NBSG53A 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider

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Description

NBSG53A 2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS * The NBSG53A is a multi-function dif.
Pin Name I/O Description 1 VTCLK. Internal 50 W Termination Pin.

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Features

* Maximum Input Clock Frequency (DFF) > 8 GHz Typical (See Figures 3, 5, 7, 9, and 10)
* Maximum Input Clock Frequency (DIV/2) > 10 GHz Typical (See Figures 4, 6, 8, 9, and 10)
* 210 ps Typical Propagation Delay (OLS = FLOAT)
* 45 ps Typical Rise and Fall Times (OLS =

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