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NBSG111
2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL* Outputs
*Reduced Swing ECL
Description The NBSG111 is a 1−to−10 differential clock/data driver. The
device is functionally equivalent to the LVEP111 device with much higher bandwidth and lower EMI capabilities.
Inputs incorporate internal 50 W termination resistors (input to VT pad) and accept NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing ECL), 400 mV.
The Q[0:9] / Q[0:9] outputs have a differential synchronous enable (EN/EN) pin. The synchronous enable pin is used to avoid a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control.