NBSG111 Description
The NBSG111 is a 1−to−10 differential clock/data driver. The device is functionally equivalent to the LVEP111 device with much higher bandwidth and lower EMI capabilities. Inputs incorporate internal 50 W termination resistors (input to VT pad) and accept NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS.
NBSG111 Key Features
- Maximum Input Clock Frequency > 6 GHz Typical
- Maximum Input Data Rate > 6 Gb/s Typical
- 300 ps Typical Propagation Delay
- 60 ps Typical Rise and Fall Times
- RSECL Output Level (400 mV Peak-to-Peak Output), Differential
- 50 W Internal Input Termination Resistors
- patible with Existing 2.5 V/3.3 V LVEP and EP Devices
- VBB and VMM Reference Voltage Output
- Pb-Free Package is Available
- For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering