Datasheet Summary
2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL- Outputs
- Reduced Swing ECL
Description The NBSG11 is a 1- to- 2 differential fanout buffer, optimized for low skew and Ultra- Low JITTER. Inputs incorporate internal 50 W termination resistors and accept
Negative ECL (NECL), Positive ECL (PECL), CML, LVCMOS, LVTTL, or LVDS. Outputs are Reduced Swing ECL (RSECL), 400 mV. All outputs loaded with 50 W to VCC
- 1.5 V for BGA package and VCC
- 2 V for QFN package.
Features
- Maximum Input Clock Frequency up to 12 GHz Typical
- Maximum Input Data Rate up to 12 Gb/s Typical
- 30 ps Typical Rise and Fall Times
- 125 ps Typical Propagation Delay
- RSPECL Output with Operating Range: VCC =...