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MC100EP196 3.3V ECL Programmable Delay Chip

MC100EP196 Description

3.3 V ECL Programmable Delay Chip with FTUNE MC100EP196 The MC100EP196 is a programmable delay chip (PDC) designed primarily for clock deskewing and t.
Pin Name I/O Default State Description 23, 25, 26, 27, 29, 30, 31, 32, 1, 2 D[0:9] LVCMOS, LVTTL, ECL Input LOW Single. ended Paralle.

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3.3V ECL Programmable Delay Chip ON Semiconductor
ON Semiconductor MC100EP196-like datasheet