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NB4N527S Dual AnyLevel to LVDS Receiver/Driver/Buffer/Translator

NB4N527S Description

NB4N527S 3.3V, 2.5Gb/s Dual AnyLevel™ to LVDS Receiver/Driver/Buffer/ Translator with Internal Input Termination NB4N527S is a clock or data Receiver.
Pin Name I/O Description 1 VTD1. Internal 50 W termination pin for D1.

NB4N527S Applications

* as well as high speed logic interface where jitter and package size are main requirements. Application notes, models, and support documentation are available on www. onsemi. com.
* Maximum Input Clock Frequency up to 1.5 GHz
* Maximum Input Data Rate up to 2.5 Gb/s (Figure 5)

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📁 Related Datasheet

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Dual AnyLevel LVDS Receiver Driver Buffer Translator ON Semiconductor
ON Semiconductor NB4N527S-like datasheet