PI6CV857L Datasheet (Pericom Semiconductor Corporation)

PI6CV857L, PLL Clock Driver

PI6CV857L PLL clock device is developed for registered DDR DIMM applications This PLL Clock Buffer is designed for 2.5 VDDQ and 2.5V AVDD operation and differential data input and output levels.

Package options include plastic Thin Shrink Small-Outline Package (TSSOP).The device is a zero delay buff

PI6CV857L Features

* PLL clock distribution optimized for Double Data Rate SDRAM applications. Distributes one differential clock input pair to ten differential clock output pairs. Inputs (CLK,CLK) and (FBIN,FBIN): SSTL_2 Input PWRDWN: LVCMOS www.DataSheet4U.com Outputs (Yx, Yx), (FBOUT, FBOUT): SSTL_2 Exter