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PI6CV855 - PLL Clock Driver for 2.5V SSTL 2 DDR SDRAM Memory

PI6CV855 Description

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PI6CV855 PLL clock device is developed for SSTL_DDR SDRAM applications.

PI6CV855 Applications

* • Distributes one differential clock input pair to five differential clock output pairs. • Inputs (CLK,CLK) and (FBIN,FBIN): SSTL_2 • Outputs (Yx, Yx), (FBOUT, FBOUT): SSTL_2 • External feedback pins (FBIN,FBIN) are used to synchronize the outputs to the clock input. • Operates at AVDD = 2.5V for c

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