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HYB39S128160FE - 128-MBit Synchronous DRAM

HYB39S128160FE Description

October 2007 www.DataSheet4U.com HYB39S128400F[E/T](L) HY[B/I]39S128800F[E/T](L) HY[B/I]39S128160F[E/T](L) HYB39S 128407 F E 128-MBit Synchronous DRA.
The HY[B/I]39S128[40/80/16][0/7]F[E/T](L) are four bank Synchronous DRAM’s organized as 32 MBit x4, 16 MBit x8 and 8 Mbit x16 respectively.

HYB39S128160FE Features

* Data Mask for Read / Write control (x4, x8) Data Mask for Byte Control (x16) Auto Refresh (CBR) and Self Refresh Power Down and Clock Suspend Mode 4096 refresh cycles / 64 ms (15.6 μs) Random Column Address eve

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Datasheet Details

Part number
HYB39S128160FE
Manufacturer
Qimonda
File Size
1.39 MB
Datasheet
HYB39S128160FE_Qimonda.pdf
Description
128-MBit Synchronous DRAM

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128-MBit Synchronous DRAM Qimonda
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