HYB39S128400CTL Datasheet - Infineon Technologies

HYB39S128400CTL 128-MBit Synchronous DRAM

PC133-222-520 P-TSOP-54 (400mil) 143MHz 4B × 8M x4 SDRAM PC133-333-520 P-TSOP-54 (400mil) 133 MHz 4B × 8M x4 SDRAM PC100-222-620 P-TSOP-54 (400mil) 100 MHz 4B × 8M x4 SDRAM PC133-222-520 P-TSOP-54 (400mil) 143 MHz 4B × 4M x8 SDRAM PC133-333-520 P-TSOP-54 (400mil) 133 MHz 4B × 4M x8 SDRAM PC100-222-.

HYB 39S128400/800/160CT(L) 128-MBit Synchronous DRAM www.DataSheet4U.com 128-MBit Synchronous DRAM High Performance: -7 -7.5 133 7.5 5.4 10 6 -8 125 8 6 10 6 Units MHz ns ns ns ns Multiple Burst Read with Single Write Operation Automatic and Controlled Precharge Command Data Mask for Read/Write Control (x4, x8) Data Mask for byte control (x16) Auto Refresh (CBR) and Self Refresh Power Down and Clock Suspend Mode 4.

HYB39S128400CTL Features

* gh. One DQM input is present in x4 and x8 SDRAMs, LDQM and UDQM controls the lower and upper bytes in x16

HYB39S128400CTL Datasheet (515.98 KB)