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HYS72T128020 - (HYSxxTxxxxx0) 240-Pin Unbuffered DDR2 SDRAM Modules

This page provides the datasheet information for the HYS72T128020, a member of the HYS64T128920 (HYSxxTxxxxx0) 240-Pin Unbuffered DDR2 SDRAM Modules family.

Datasheet Summary

Description

The memory array is designed with 512-Mbit Double-DataRate-Two (DDR2) Synchronous DRAMs.

Decoupling capacitors are mounted on the PCB board.

The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol.

Features

  • Auto Refresh (CBR) and Self Refresh Programmable self refresh rate via EMRS2 setting Programmable partial array refresh via EMRS2 settings DCC enabling via EMRS2 setting All inputs and outputs SSTL_1.8 compatible Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) Serial Presence Detect with E2PROM UDIMM Dimensions (nominal): 30 mm high and 133.35 mm wide Based on standard refe.

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Datasheet Details

Part number HYS72T128020
Manufacturer Qimonda
File Size 5.55 MB
Description (HYSxxTxxxxx0) 240-Pin Unbuffered DDR2 SDRAM Modules
Datasheet download datasheet HYS72T128020 Datasheet
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www.DataSheet4U.com October 2006 HYS64T32[0/9]00EU-[25F/2.5/3/3S/3.7]-B2 HYS[64/72]T64[0/9]00EU-[25F/2.5/3/3S/3.7]-B2 HYS[64/72]T128[0/9]20EU-[25F/2.5/3/3S/3.7]-B2 2 4 0 - P i n u n b u f f e r e d D D R 2 S D R A M Mo d u l e s DDR2 SDRAM UDIMM SDRAM RoHs Compliant Internet Data Sheet Rev. 1.0 www.DataSheet4U.com Internet Data Sheet HYS[64/72]T[32/64/128][0/9]xxEU-[25F/2.5/3/3S/3.7]-B2 Unbuffered DDR2 SDRAM Module HYS64T32[0/9]00EU-[25F/2.5/3/3S/3.7]-B2, HYS[64/72]T64[0/9]00EU-[25F/2.5/3/3S/3.7]-B2, HYS[64/72]T128[0/9]20EU[25F/2.5/3/3S/3.7]-B2 Revision History: 2006-10, Rev. 1.0 Page All All 4,5 16 – 20 34, 35 38 – 42 45 – 92 Subjects (major changes since last revision) Qimonda update Adapted internet edition Ordering information table.
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