Datasheet Details
Part number:
8SLVD1212
Manufacturer:
File Size:
2.06 MB
Description:
LVDS fanout buffer
Datasheet Details
Part number:
8SLVD1212
Manufacturer:
File Size:
2.06 MB
Description:
LVDS fanout buffer
Features
* ▪ Twelve low skew, low additive jitter LVDS output pairs ▪ Two selectable, differential clock input pairs ▪ Differential PCLK, nPCLK pairs can accept the following differential input levels: LVDS, LVPECL, CML ▪ Maximum input clock frequency: 2GHz (maximum) ▪ LVCMOS/LVTTL interface levels for the conApplications
* that demand well-defined performance and repeatability. Two selectable differential inputs and twelve low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The 8SLVD1212 is optimized for low power consumption and8SLVD1212 Distributors
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