8SLVP1204 Datasheet - Renesas

8SLVP1204 LVPECL Output Fanout Buffer

The 8SLVP1204 is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1204 is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-pa.

8SLVP1204 Features

* Four low skew, low additive jitter LVPECL output pairs

* Two selectable, differential clock input pairs

* Differential PCLKx pairs can accept the following differential input levels: LVDS, LVPECL, CML

* Differential PCLKx pairs can also accept single-ended LVCMOS le

8SLVP1204-Renesas.pdf