9DB106 - Six Output Differential Buffer

Renesas

Datasheet Details

Part number	9DB106
Manufacturer	Renesas ↗
File Size	298.44 KB
Description	Six Output Differential Buffer
Datasheet	9DB106-Renesas.pdf

Benefits The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Expres.

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Published: Jan 21, 2020 |